SECTION 2
EM-180 COMPONENTS
| 2-1 | Operator's Station
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| 2-2 | Emulator Probe
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| 2-3 | Keyboard
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| 2-4 | Diagnostic EPROM Socket
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| 2-5 | Display Panel
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| 2-6 | Trace Memory
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| 2-7 | Back Panel Controls and Connectors
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| 2-8 | RAM Overlay
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| 2-9 | Disassembler
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The EM-180 Operator's Station consists of a Keyboard, Display Panel, Diagnostic EPROM Socket, Back Panel Controls and Connectors. It contains most of the system electronics, including the emulation control circuitry, Trace Memory, Breakpoint Comparators, plus control firmware with preprogrammed test routines. A RAM Overlay option may be included. See Figure 2-1.1.
The EP-Z80 (EP-Z80B) is the Emulator Probe for the Z-80 micrporocessor. The Probe contains the CPU and associated circuitry and buffers. It connects to the Operator's Station via 40-inch ribbon cables and to the target system CPU socket via 11-inch ribbon cables and a 40-contact DIP connector.
The Keyboard has 32 keyswitches divided into four groupings: Processor Control, Mode Select, Subfunction Control and Data Entry.
A low insertion force EPROM socket to accept EPROMs compatible with intel 2716 or 2732 types (single +5 power supply and Intel pinout). The user may create his own system test and diagnosis routines, program the EPROM with these routines, insert the EPROM into the EM-180 front panel socket and then execute the routines in a convienent manner from the EM-180 Keyboard. See Section 8: USER IMPLEMENTED CODE FUNCTIONS.
The Display Panel consists of a LED dot-matrix address and data displays and of individual LED indicators. Address and data information are displayed in hexadecimal notation. The individual indicator LEDs are divided into five groupings: Fault indicators (CLK, RESET) show loss of system clock or a continuous RESET condition; Machine Cycle indicators (M1, M1', BKPT, EXT, IORQ, IACK, RD, WR) readout the control bus and other information acquired during target program execution; the microprocessor condition code bits (S, Z, H, P/V, N, C) are also displayed on these indicators; CPU Status indicators (IENA, INT, NMI, BUSR, Wait, Halt, Pause) show the condition of the emulated target system CPU; Breakpoint Enable (BKPT ENA) is illuminated if the Breakpoint System is enabled.
The Trace Memory is a 252-word by 32-bit memory that captures information from each bus cycle of the emulated target system microprocessor. The information recorded is: the 16 address bits, 8 data bits, CPU read and write signals, the type of bus cycle (i.e., op-code fetch, I/O, or Interrupt Acknowledge) and two possible breakpoint sources--the Breakpoint comparators and the External Breakpoint input.
Figure 2-1.1. Operator's Station
(picture)
Figure 2-7.1. Back Panel
(picture)
The Back Panel of the EM-180 includes the controls and various connectors used to connect the Diagnostic Emulator with power, the Emulator Probe and other external equipment:
Main Power Switch
Controls the primary power to the unit.
Baud Rate Selector Switch
A 16-position switch is used to control the transmission rate of serial data flow between the Diagnostic Emulator and peripheral equipment. The baud rate selection options are visible on the back Panel template shown in Figure 2-7.1.
Auxiliary Connector
A 25-pin, D subminiature female connector. It provides RS-232C signals and additional control signals to auxiliary equipment (i.e., signature analyzer, oscilloscope, target system, development system). See Section 9-1.
Option Switches
These switches control characteristics of the EM-180 RESET circuitry and communications interface. The normal switch positions for most users are show in Figure 2-7.1. The EM-180 is shipped from the factory in this configuraiton. Alternative positions are discussed and illustrated in Section 9-2.
RAM Overlay Bank A and Bank B Address Switches
Two 16-position switches are used to select the address range to which the A and B blocks of enabled overlay memory responds. See Section 5, RAM Overlay.
RAM Overlay Bank A and Bank B Enable Switches
Two 3-position toggle switches control the A or B block of overlay memory. The left position (OFF) disables a memory block, effectively removing it from the system. The center position (READ) enables the memory block for read-only operations (read-only-memory simulation). The right position (RD/WR) enables a memory block for both read and write operations.
The EM-80 may be configured to include optional overlay memory. This feature consists of 8K bytes of 200 nsec static memory that is divided into two independent 4K byte blocks. Each block may be enabled as read-write memory, used as read-only memory or disabled. Back Panel switches are used to adjust each memory block to reside in any one of 16 address blocks in the target address space. When a memory block is enabled, it is mapped into the target address space, overlaying the user's system in the address block selected. The overlay memory may be loaded from the target system memory, front panel EPROM or external device by executing the appropriate Code Function. See Section 5, RAM Overlay.
The EM-180 may be configured with an optional firmware package that provides for formatting and output of system information to an ASCII terminal device with RS-232C interface such as a CRT or hard copy terminal. The disassembly firmware extracts information fro the EM-180 Trace Memory and emulation processor registers, formats the data for display with instruction op-codes given in standard Zilog mnemonic form (JP, ADD, PUSH, SET, LS, etc.) and outputs the data through the serial port. See Section 6.